Emitter-switched thyristor

ABSTRACT

In an emitter-switched thyristor with a main thyristor (TH) composed of a p+ anode emitter (1), a drift zone (3&#39;) of opposite conductivity type, a zone (4) which has in the switched-off state a blocking zone with respect to zone (3) and an emitter zone (5) at the cathode side, again with an opposite conductivity type, so that a p+n-pn+ zone sequence results, a transistor structure (T) composed of the first three zones of alternating conductivity is provided in parallel thereto with an emitter (1), base (3) and a collector (8). This structure contains a NMOSFET (M1) for directly driving the cathode emitters (5) through the cathode connection (KA). The source of this transistor is contacted by the cathode, as well as the collector zone (8) which forms the channel zone of the MOSFET at the surface of the semiconductor. The corresponding drain zone is connected to the n+ cathode emitter (5) of the main thyristor (TH) by an electric conductor (6). A switching-in DMOSFET (M2) is further provided whose gate (G2) is connected to the gate (G1) of the NMOSFET (M1), a source (S2) contacted by the cathode (K) and embedded in a p-base. A conductive connection is established with the cathode contact of the switching-in NMOSFET (M1), and the common connection extends up to a cathode connection (KA). A drain zone (D2) is embedded in the drift zone (3) and the substrate zones of M1 and M2 are in contact with the cathode. The structure contains a PMOSFET (M3) whose gate is connected to the cathode, whose drain (D3) forms a part of the collector zone (8) of the transistor (T) for the secondary current, whose source zone is connected to the base zone (4) of the main thyristor (TH) next to the cathode and whose substrate zone is formed by a part of the n-doped zone (3) adjacent to the surface of the component.

BACKGROUND OF THE INVENTION

The invention relates to an emitter-switched thyristor, having a mainthyristor, which is formed from a p+ anode emitter, a drift zone havingan opposing conduction type, a zone which, in the turned-off state ofthe thyristor, has a blocking zone with respect to the drift zone, and acathode-side emitter having, again, a reversed conduction type resultingin a zone sequence p+n-pn+; a transistor structure, which is parallel tothe main thyristor and comprises three regions of alternatingconductivity types: an emitter, which is identical to the p+ anodeemitter, an n-doped zone as a base, and a collector region; and, anNMOSFET for direct actuation of the cathode emitter, with the source ofthis transistor, like the collector region, being contacted by acathode, which is connected to a cathode connector.

An advantage of emitter-switched thyristors is that they can easily becontrolled via a gate having a low voltage drop. Most ESTs(Emitter-Switched Thyristors) have no pronounced current saturation,because the saturation is limited by the breakdown voltage of theturn-on MOSFET, which is switched in series with the main thyristor. TheESTs having a twin channel have the disadvantage of a high voltage dropin the forward direction. A MOSFET of this type is described in thepublication of M. S. Shekar, B. J. Baliga, M. Nandakumar, S. Tandon andA. Reisman: "High-Voltage Current Saturation in Emitter SwitchedThyristors," IEEE ELECTRON DEVICE LETTERS, VOL. 12, NO. 7, JULY 1991.

The publication of A. Bhalla, T. P. Chow, K. C. So: "RECEST: A ReverseChannel Emitter Switched Thyristor," ISPSD-95, Proc. Int. Symp. on PowerSemic. Dev. and ICS, 1995, Yokohama, pp. 24-28, discloses anemitter-switched thyristor that forms a main thyristor between a"floating" n+ emitter, a p trough, an n drift region, an n buffer zoneand a p+ substrate. The floating n+ emitter is short-circuited to the n+drain region of the lateral, series-connected MOSFET by a floating metalconnection. The thyristor current is thereby forced to flow through theseries MOSFET. A parasitic thyristor is present between the n+ source,the p trough, the n drift region, the n buffer zone and the p+substrate. Both parts of the gate are connected to the boundary of thecell, which forms an approximately 100- m-long strip in the z direction.The p trough under the floating n+ emitter is short-circuited in the zdirection to the p+ region and the cathode at the boundary of the cellof the individual component (see FIG. 1).

Turn-on is effected by the application of a positive voltage to the gateand a positive bias voltage to the anode. The gate effects electroninversion layers under the lateral series MOSFET and the DMOS gate. Theelectrons flow from the cathode and into the drift region via thelateral series MOSFET, the floating metal connection, the floating n+emitter and the DMOS channel. This in turn effects the injection ofholes from the p+ substrate, a few of which are captured by the ptrough. This hole current flows under the floating n+ emitter in the zdirection, and polarizes the n+/p trough transition in the forwarddirection, and turns on the main thyristor. Because the lateral seriesMOSFET is regarded as the sole source of electrons for the floating n+emitter (via the floating metal connection), the entire thyristorcurrent must flow through the series MOSFET. This leads to agate-switched current saturation in the turned-on state.

To turn off the component, a negative voltage is applied to the gate.The gate turns off the lateral series MOSFET and activates the p-channelMOSFET, which bypasses the hole current. This produces a path for thehole current from the p trough to the cathode contact. Because this holecurrent does not flow under the n+ source, the dynamic latching of theparasitic thyristor is suppressed. To the extent to which the anodevoltage increases during turn-off, the potential of the JFET region willincrease prior to the recovery of the transition between the p troughand the n drift region. Even if the gate is maintained at zero Volts, ap-type inversion layer is induced. Because the region of the p trough islikewise at a fairly-high potential (10-20 V), the PMOS distributer isactivated, and the holes are led away via this path.

Some mechanisms for the malfunction of the component during turn-offhave been established for emitter-switched thyristors. Examples includelatching of the parasitic thyristor, breakdown of the lateral seriesMOSFET, breakdown in the z direction of the transition between the ptrough and the n+ region at the boundary of the individual componentcell, and current-induced avalanche breakdown at high voltages. Thiscomponent can also be destroyed by one of these mechanisms, depending onthe following design and operating conditions:

1. The current density for the latching of the parasitic thyristor canbe brought to a higher level by the reduction in the dimensions of theregions on the right side of the p+ region of the distributor MOSFET.

2. During turn-off, the potential of the floating n+ emitter increaseswith the potential of the p trough, whereas it follows the anodepotential before the transition between the p trough and the n+ emitterregion has recovered. Because the floating n+ emitter region isshort-circuited to the drain region of the lateral series MOSFET, thiscan result in the breakdown of the MOSFET.

3. When the PMOS distributor is activated, the hole current, which flowsthrough the p channel, constructs a lateral voltage drop after beingcaptured by the ptrough region. This voltage drop is the most positiveon the left side of the component (see FIG. 1, center of the floatingemitter region). Because the potential of the floating n+ emitter islimited to the diode drop of the very-positive p-trough potential, thetransition from the p trough to the n+ region, starting from the centerof the floating emitter and increasing up to the JFET region, ispolarized in the blocking direction. Now, however, the region of the ptrough is short-circuited to the cathode in the z direction. The biasvoltage at the transition between the n+ emitter region and the p troughat the cell boundary is larger by the voltage drop over the PMOS channelthan under the DMOS gate. This voltage drop can be large enough to leadto a breakdown of the transition under the gate. The breakdown of thistransition will begin at the cell boundaries, very likely at the spatialtransitions embodied at the corners of the floating emitter window.

In addition to the destruction caused during turn-on by the blockingpolarization of the floating n+/p trough transition, and theaforementioned avalanche breakdown, known emitter-switched thyristorshave the disadvantage that, in the turned-on state, the saturation ofthe anode current can only be effected by the saturation of the lateralNMOSFET. To attain a good saturation, the NMOSFET must have a highbreakdown voltage. This, however, significantly increases its resistancein the turned-on state, and thus increases the voltage drop over theturned-on thyristor. During turn-off, the voltage drop in the lateralNMOSFET increases, and threatens to destroy the NMOSFET. The voltagedrop is basically determined by the resistance in the turned-on state ofthe p channel in the JFET region. In this component, referred to asRECEST, the p channel is embodied as a longitudinal channel, and its"on" resistance is therefore very high.

BRIEF SUMMARY OF THE INVENTION

It is an object of the invention to reduce the voltage drop over thetransition between the p trough and the floating n+ region. It is afurther object of the invention to reduce the voltage drop over thelateral NMOSFET, and to maintain the saturation of the anode current inthe turned-on stage, even with high anode voltages.

The above object generally is achieved according to the presentinvention by an emitter-switched thyristor having a main thyristor,which is formed from a p+ anode emitter, a drift zone having an opposingconduction type, a zone which, in the turned-off state of the thyristor,has a blocking zone with respect to the drift zone, and a cathode-sideemitter having, again, a reversed conduction type, resulting in a zonesequence p+n-pn+; a transistor structure, which is parallel to the mainthyristor and comprises three regions of alternating conductivity typesincluding an emitter, which is identical to the p+ anode emitter, ann-doped zone as a base, and a collector region; an NMOSFET for directactuation of the cathode emitter, with the source of this transistor,like the collector region of the transmitter, being contacted by acathode, which is connected to a cathode connector; a turn-on DMOSFET,whose gate is connected to the gate of the NMOSFET; a source, which islikewise contacted by the cathode, and is embedded in a p base that isidentical to the collector region; a drain region, which is embedded inthe n-doped zone, with the channel region of the DMOSFET being disposedin the collector region; and a PMOSFET, whose gage is connected to thecathode and whose drain is a part of the collector region, whose sourceregion is connected to the zone of the main thyristor, and whose channelregion is formed by a part of the n-doped zone that borders on thecomponent surface.

An advantage of the thyristor according to the invention is that theMOS-switched thyristor has a safe operating range, with the saturationbehavior of the anode current protecting the component againstoverstressing. The component can be turned on by unipolar potentials;the p base 4 can float, that is, its potential is not establishedexternally.

In addition to a main current path, the MOS-switched thyristor of theinvention also includes a secondary current path.

The main current path comprises a thyristor structure having thefollowing regions: a p+ anode emitter, an n drift zone, a p base, n+emitter and a downstream turn-off MOSFET (NMOS). The cathode side ofthis thyristor possesses no short-circuit between the p base and thecathode. For turning on the thyristor, a DMOSFET is provided, whose gateis short-circuited to the gate of the NMOS. This main current pathapproximately corresponds to the conventional EST, but with abackward-oriented turn-on channel (DMOS).

The secondary current path comprises a bipolar transistor having a p+emitter, an n drift zone and a p collector. The collector p base isconnected via a p-channel MOSFET to the p base of the thyristor. Thegate of this PMOS is short-circuited to the cathode K of the component.The gate thus controls itself, depending on the state of the entirecomponent.

BRIEF DESCRIPTION OF THE DRAWING

Examples for the invention are described in detail below in conjunctionwith the drawing. Shown are in:

FIG. 1 a RECEST component according to the state of the technology;

FIG. 2 the basic structure of the component of the invention;

FIG. 3 the equivalent circuit diagram for FIG. 2, for comparison withthe equivalent circuit diagram of the component according to the stateof the technology;

FIG. 4 a lateral embodiment with an integrated lateral NMOSFET;

FIG. 5 the lateral embodiment of the component with an integratedlateral MOSFET and a dielectric insulation layer; and

FIG. 6 a vertical embodiment of the component.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2 shows a cross-section of the basic structure of the componentaccording to the invention. This basic structure can also be seen in theequivalent circuit diagram in FIG. 3a. The emitter-switched thyristor ofthe invention has a parallel lateral IGBT T, which is parallel to itsthyristor structure TH, and is switched in series with a lateral NMOSFETM1, as in all conventional lateral, emitter-switched thyristors. Itsfunction is described below. The component according to the state of thetechnology, which is shown in FIG. 1, has a different structure; itsdistinction from the invention is clarified through a comparison of thecorresponding equivalent circuit diagrams 3a and 3b.

An embodiment according to FIGS. 2 and 3a, which is especially preferredfor SOI components, has in a substrate S a lateral insulation layer I,above which a lateral thyristor element TH is located. The thyristorelement includes a first emitter zone 1, which has a p conductivity andis contacted by the anode layer A, which is surrounded here by an nbuffer zone 2, for example; a first base zone 3 having an n conductivityand a drift zone 3'; a second base zone 4 having a p conductivity; asecond emitter zone 5, which has an n conductivity and is connected tothe drain of the N MOSFET M1; and a further base zone 8, which isseparated from the base zone 4 and has a p conductivity, and in whichthe source S2 of M2 is embedded as an n+ region and which is contactedby the cathode K.

FIG. 4 shows the integration of M1 into the p trough 8 of the component.To reduce the resistance, two MOSFETs M1 and M1' having a common drainregion D1 are switched in parallel and connected via the conductingtrack 6 to the cathode-side emitter zone 5 of the main thyristor. The n+source regions S1 and S1' are contacted by the cathodes K and K',respectively. The gate G1 is interconnected with the gate G2, andconnected to the gate connector GA.

In addition to the NMOSFET M1, a DMOSFET M2 is provided; its gate G2 isshort-circuited to the gate G1 of the NMOSFET M1. The gate layer of theMOSFET M2 is located above the base zone 3 leading through, as a drainzone D2, to the component surface; above the p base zone 9 leadingthrough to the surface; and above a portion of the component cathodeleading through, as a source, to the surface. A third MOSFET (PMOSFET)has a p base zone 4 as a source, the zone being inserted into the n basezone 3. An n zone 5 is inserted, as an emitter of the main thyristor TH,into the n base zone 3, and is contacted by a metallic layer connectedto the conducting track 6. Extending from the cathode layer K is ametallic layer that is insulated by the substrate and covers a portionof the p base zone 8 that leads through, as a drain D3 of the MOSFET M3,to the surface, as well as the n base zone 3 guided through to thesurface under the layer, and a portion of the p zone 4. The gate of theMOSFET M3 is short-circuited to the component cathode.

In the equivalent circuit diagram FIG. 3a, the thyristor is representedby TH; the parallel transistor, which is formed by the p emitter zone 1,the n base zone 3 and the p base zone 8, is represented by T; and theMOSFET is represented by M1, M2, M3.

When a positive potential is applied to the anode A relative to thecathode K, and a sufficiently-positive voltage is applied to the gateelectrode GA, to turn on the lateral NMOSFET M1 and the n channelDMOSFET M2, the cathode K injects electrons, which flow via the nchannel of the DMOSFET M2 into the drain region D2, and via the n driftregion 3 to the anode. This induces holes from the anode as soon as theanode voltage exceeds 0.7 V.

The turned-on lateral series NMOSFET M1 short-circuits the floating n+emitter zone 5 to the cathode K. Because no current flows through theNMOSFET M1 before the thyristor is turned on, no voltage drop can occurduring this short-circuit. The p base zone 4 has a low potential, andcollects the holes. These holes collect on the p side of the transitionfrom the p+ base zone 4 to the floating n+ emitter 5, and polarize thistransition in the forward direction. When this bias voltage exceeds 0.7V, the main thyristor is turned on. In the turned-on state, the maincurrent of the thyristor flows through the lateral series NMOSFET M1,resulting in the current saturation of the NMOSFET. If, on the otherhand, the anode receives a high voltage, the high potentials of thesource region S3 of the parallel-switched, lateral PMOSFET M3 and the nsubstrate 3 ensure that the PMOSFET M3, whose gate is at cathodepotential, is turned on with the aid of an inversion channel 7. Theturned-on PMOSFET conducts the holes from the p base zone 4 to thecathode, limits the cathode potential and thus limits the potential ofthe floating n+ emitter zone 5. This means that the voltage drop fromthe drain to the source of the lateral NMOSFET M1 is limited by thePMOSFET M3. Thus, a very good current-saturation behavior of thecomponent is attained.

Because of the separation of the p base zone 4 from the p base zone 8,during the turn-on process, no path is present for holes collected bythe p base zone 4. Therefore, the main thyristor is supported in itsturn-on behavior.

Furthermore, the lateral expansion of the floating n+ emitter zone 5 andthe p base zone 4 under the n emitter zone 5 is limited to the extentthat requirements of the circuit design can be considered. The finalconsequence of this is a reduction in the size of the component cells inthe integrated circuit connection.

For turn-off of the component, the bias voltage of the gate G isreduced, with the lateral NMOSFET M1 and the n channel DMOSFET M2likewise being turned off. Because of the continuity condition for thecurrent, the potentials of the floating n+ emitter 5 and the p base 4,and therefore the potential of the n base region 3, increase veryrapidly. If the potential of the n base 3 has increased beyond aspecific value, the parallel PMOSFET M3 turns itself on. This creates apath for the holes stored in the p base 4, which flow from there to thecathode. The current through the main thyristor to the lateral PNPtransistor therefore changes. The lateral PNP transistor T comprises thep+ region 1 under the anode A as an emitter, the n drift region 3' andthe p base zone 8 as a collector. The PNP transistor is turned off dueto the recombination of the holes with the electrons in the driftregion.

During turn-off, M1 and the NMOSFET M2 are shut off. The current throughthe channel of the PMOSFET M3 increases because the PMOSFET turns on.The current flows directly to the cathode, i.e., it does not travel viaa bypass under an n+ region. This is the primary reason for theimprovement in the dynamic latching behavior of the component. On theother hand, the p base 4 can be heavily doped, and the expansion in thelateral direction can be made small, insofar as this is a primary designconsideration. The result is a small voltage drop in the p base 4 duringthe turn-off process.

An embodiment of the invention that is only shown in a fundamentalrepresentation in FIG. 2 is shown in concrete form in FIG. 4. TheNMOSFET M1 is integrated there into the p base zone (or p trough 8). Thearrangement of the other components is unchanged with respect to FIG. 2.

FIG. 5 shows a further example for the application and embodimentoptions of the invention. The special embodiment is preferably suitablefor SOI components. The substrate S is insulated from the actualcomponent by an insulation layer I. To block the current path againstthe latching of the parasitic transistor, a trough having an insulationlayer 10 is provided. So that the current can flow through the mainthyristor, however, M2 is disposed on the anode side. The known functionof M2 is unchanged.

As shown in FIG. 6, a vertical component can likewise be realized withthe invention. In comparison to FIG. 4, the anode is displaced only onthe underside of the semiconductor wafer. The parasitic thyristor, whoseembodiment is also effectively suppressed in this arrangement, is shownin the right portion of the figure. The mechanisms of the ignition,current limitation and prevention of the latching of the parasiticthyristor do not differ from those explained above in connection withFIG. 2.

The following three advantages can be attained with the invention:

1. The breakdown behavior of the transition from the n+ emitter 5 to thep base 4 is improved during the turn-off process.

2. The PMOSFET M3 is turned on by a relatively-high voltage at the nbase 3, the zone representing the substrate region of M3. Then M3distributes the holes from the p base 4, which reduces the currentthrough M1. The potential of the p base 4 is consequently also reduced,and the constant voltage drop at M1 leads to an improved currentsaturation.

3. During turn-off, the holes are bypassed from M3 directly to thecathode. The dynamic latching of the parasitic thyristor is thussuppressed.

The thyristor of the invention comprises an emitter-switched thyristorhaving a main thyristor TH, which is formed from a p+ anode emitter 1, adrift zone 3' having an opposing conduction type, a zone 4 which, in theturned-off state of the thyristor, has a blocking zone with respect tothe drift zone 3', and a cathode-side emitter 5 having, again, areversed conduction type, resulting in a zone sequence p+n-pn+; atransistor structure T, which is parallel to the main thyristor andcomprises three regions of alternating conductivity: an emitter 1, whichis identical to the p+ anode emitter 1, an n-doped zone 3 as a base, anda collector region 8; and an NMOSFET M1 for direct actuation of thecathode emitter 5, with the source of this transistor, like thecollector region 8, being contacted by a cathode K, which is connectedto a cathode connector.

The collector region 8 forms a channel region of the NMOSFET at thesurface of the semiconductor, with the associated drain region beingconnected to the cathode emitter 5 of the main thyristor TH via anelectrical conductor 6, and having a turn-on DMOSFET M2, whose gate G2is connected to the gate G1 of the NMOSFET M1; a source S2, which islikewise contacted by the cathode K, and is embedded in a p base that isidentical to the collector region 8; a drain region D2, which isembedded in the n-doped zone 3, with the channel region of the DMOSFETbeing disposed in the collector region 8; and a PMOSFET M3, whose gateis connected to the cathode and whose drain D3 is a part of thecollector region 8, whose source region is connected to the zone 4 ofthe main thyristor TH and whose channel region is formed by a part ofthe n-doped zone 3 that borders on the component surface.

The advantage of the component of the invention is that, in contrast tothe state of the technology, the gate of the NMOSFET M1 and the gate ofthe DMOSFET M2 are no longer automatically connected to one another. Inthe state of the technology, these gates are connected as shown in FIG.1, so the thyristor is automatically turned on with the gates and,consequently, can break down. In contrast, the thyristor according tothe invention is protected, and the current flux through the thyristorremains limited, even at higher voltages.

A further, practical embodiment of the component of the inventioninvolves the complementary configuration of the component, with theconduction types of the individual component regions being replaced bytheir complementary conduction types and the function of the componentzones and electrodes changing accordingly.

What is claimed is:
 1. An emitter-switched thyristor havinga mainthyristor (TH), which is formed from a p+ anode emitter (1), a driftzone (3') having an opposing conduction type, a zone (4) which, in theturned-off state of the thyristor, has a blocking zone with respect tothe drift zone (3'), and a cathode-side emitter (5) having, again, areversed conduction type, resulting in a zone sequence p+n-pn+; atransistor structure (T), which is parallel to the main thyristor andcomprises three regions of alternating conductivity: an emitter (1),which is identical to the p+ anode emitter (1), an n-doped zone (3) as abase, a collector region (8); and an NMOSFET (M1) for direct actuationof the cathode-side emitter (5), with the source of this transistor,like the collector region (8), being contacted by a cathode (K), whichis connected to a cathode connector; a turn-on DMOSFET (M2), whose gate(G2) is connected to a gate (G1) of the NMOSFET (M1); a source (S2),which is likewise contacted by the cathode (K), and is embedded in a pbase that is identical to the collector region (8); a drain region (D2),which is embedded in the n-doped zone (3), with the channel region ofthe DMOSFET being disposed in the collector region (8); and a PMOSFET(M3), whose gate is connected to the cathode and whose drain (D3) is apart of the collector region (8), whose source region is connected tothe zone (4) of the main thyristor (TH) and whose channel region isformed by a part of the n-doped zone (3) that borders on the componentsurface.
 2. The emitter-switched thyristor according to claim 1, whereinthe thyristor is embodied as a lateral thyristor, namely the cathode(K), gate (G) and anode (A) are disposed on one side of a semiconductorwafer.
 3. The emitter-switched thyristor according to claim 1, whereinthe thyristor is embodied as a vertical thyristor, namely the cathode(K) and gate (G) are disposed on the one side, and the anode (A) isdisposed on the other side, of a semiconductor wafer.
 4. Theemitter-switched thyristor according to claim 1, wherein below thecathode metallization (K), an oxide-filled trough that extends down toan insulation layer (I) between the substrate (S) and the semiconductorwafer, and the MOSFET (M2) are disposed between the cathode (K) and theanode (A).
 5. The emitter-switched thyristor according to one or more ofclaim 1, wherein the thyristor has a substrate (S) that is insulatedfrom the actual component.
 6. The emitter-switched thyristor accordingto one or more of claim 1, wherein the thyristor is of a complementarytype.